Advances in Compound Semiconductor Devices: Epitaxial Growth, Simulation, Processing, Characterization, Modelling and Applications
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Submission deadline: 02/15/2015
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Scope and purposes
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The Journal of Microelectronics and Solid State Electronics announces the publication pf a special issue on advances in applications of Compound Semiconductor Devices. The goal of this special issued is to gather the latest works (academic and industrial) in the field of Compound Semiconductor devices with the focus on applications and realization. The Journal of Microelectronics and Solid State Electronics invites original contributions in the field of Solid State electronic devices.
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Topics of primary interest include, but are not limited to:
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• Growth of Compound Semiconductor and Related Devices (such as GaAs, InP, SiGe, GaN, ZnSe, ZnS, carbon related materials, oxide based semiconductors, organic semiconductors, etc.) • Physical simulations of Compound Semiconductor devices • Processing methods for Compound semiconductor Devices (i.e. Novel lithography, etching techniques (wet chemical etching and plasma based etching techniques) in order to improve the yield, processing simplicity and electrical performance of the devices • High frequency and high power electronic circuits based on compound semiconductor devices. • Characterization and modelling of compound semiconductor devices
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Important Dates
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Deadline for submission:
02/15/2015
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Deadline for
revision:
04/30/2015
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Notification of final decision:
05/30/2015
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Estimated Publication:
2015 (Tentative)
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Submission
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Abstracts addressing one or more of these themes/topics or further questions should be emailed to an editor by <02/15/2015> at serkantopaloglu77@gmail.com Manuscript submissions are invited by the submission deadline. All papers will undergo a double or triple-blind peer review process.
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Guest Editors
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Serkan TopalogluTRON ELEKTRONIK Sist. San. ve Tic. A.S. serkantopaloglu77@gmail.com
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Manuscript submission deadline
02/15/2015
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Emerging techniques for nano-scales CMOS integrated circuits design
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Submission deadline: August 1, 2014
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Scope and purposes
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Despite Challenges, CMOS Technology is Here to Stay. While several promising alternatives to replace silicon based CMOS technologies are actively developed; CMOS maturity, low manufacturing cost, high speed and low power consumption will extend its dominance for at least in the next ten to fifteen years. As the CMOS technology scales down to the nanometer level IC designers are facing several challenges including supply voltage reduction, excessive leakage current and statistical uncertainty with process variations and mismatch that all restrict the design of high performance digital, analog, mixed-signal, and RF circuits. Also the growing demand for more complex ultra-low power devices exacerbates these challenges and makes the operation reliability of integrated circuits despite of variations a hard to achieve goal. The scope of this special issue is to report on the continuous innovation and new developments in CMOS integrated circuits to overcome these challenges. The research portfolio of this issue includes emerging techniques on low-power RF, digital, mixed-signal and analog CMOS design of circuits and systems, energy efficient integrated circuits for communication, sensing and biomedical applications.
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Topics of primary interest include, but are not limited to:
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• Recent development in nanoscale CMOS circuits including RFICs, mixed-signal circuits, Analog building blocks,etc. • Sub-threshold digital and analog circuits • Reliability-aware and variation-aware design techniques • Signal processing and digital assisted methods for high performances circuits • Optimization methods for Energy-efficient integrated circuits • Biologically-Inspired System and Circuit Design
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Important Dates
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Deadline for submission:
August 1, 2014
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Deadline for
revision:
October 1, 2014
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Notification of final decision:
November 1, 2014
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Estimated Publication:
December, 2014 (Tentative)
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Submission
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Abstracts addressing one or more of these themes/topics or further questions should be emailed to an editor by August 1, 2014 at Kamal.El-Sankary@dal.ca Manuscript submissions are invited by the submission deadline. All papers will undergo a double or triple-blind peer review process.
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Guest Editors
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Kamal El-SankaryDalhousie University Kamal.El-Sankary@dal.ca
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Manuscript submission deadline
August 1, 2014
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Emerging Device and Circuit Techniques for ultra low power design in the nano scale technologies
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Submission deadline: 12/05/2012
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Scope and purposes
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Demand for energy constrained design has increased tremendously with technology scaling due to several factors like increasing problems of leakage currents, thermal management, heat removal and reliability issues etc. Along with these problems, there is also an increasing class of applications like portable electronics, wireless micro sensor networks, radio frequency identification and biomedical implants, which demand ultra low power consumption and prolonged battery life. All these concerns motivating the designers to explore various alternative device structures such as multi-gate MOSFETs, Nano electro-mechanical switch (NEMS) based devices, Tunnel FETs, CNFETs etc, along with several circuit and architectural techniques (emerging Non-volatile memories such as RRAMs, STTRAMs, NEMS NVMs etc,) in co-design for achieving energy efficient systems.
The aim of this issue is to foster state-of-the-art research in the area of emerging nano scale devices, circuit techniques to provide ultra low power or in strict sense, energy efficient applications. Papers are invited based on analytical, numerical, compact modeling of devices and simulation studies carried out on emerging device, circuit techniques.
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Topics of primary interest include, but are not limited to:
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• Ultra-Thin Body Transistors
• Multi-gate MOSFETs (FinFETs, Nanowires etc.)
• Low- Power and Steep Slope Switching Devices : Tunnel FETs, NEMFETs, IMOS
• Graphene Devices and CNFETs
• Compound semiconductor devices and Technology
• Subthreshold logic
• NEMS- CMOS hybrid integration
• Ultra low power FPGA
• Ultra low-power SRAM design
• Alternative SRAM bitcells
• Low power circuit techniques
• Low power architectural techniques
• Non volatile memories such as RRAMs, STT-MRAM, PCRAM, NEMS-NVM etc.
• Energy harvesting devices and circuits for microwatt applications: Piezo, thermal, photovoltaic, RF etc.
• Ultra low power DC-DC converter topologies
• Energy efficient designs
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Important Dates
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Deadline for submission:
12/05/2012
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Deadline for
revision:
02/05/2013
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Notification of final decision:
02/20/2013
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Camera-Ready Final Manuscript Due:
03/15/2013
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Estimated Publication:
2013 (Tentative)
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Submission
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Abstracts addressing one or more of these themes/topics or further questions should be emailed to an editor by <12/05/2012>. Manuscript submissions are invited by the submission deadline. All papers will undergo a double or triple-blind peer review process.
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Guest Editors
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Dr. Ramesh Vaddi,Vaddiramesh2k9@gmail.com
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Manuscript submission deadline
12/05/2012
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