Computer Science and Engineering

Computer Science and Engineering is a peer-reviewed journal that deals with all aspects of computer science. It publishes articles which contribute new theoretical results in all areas of the foundations of computer science. Papers reporting original research and innovative applications from all parts of the world are welcome.

Nikolaos Kavvadias

Editorial Board Member of Computer Science and Engineering

Lecturer, University of Peloponnese, Greece

Research Areas

Computer Architecture, Application-specific Processors, High-level Synthesis, HDLs, FPGAs, EDA tools

Education

2008Ph.D.Department of a methodology from the Aristotle University of Thessaloniki
2002M.Sc.Electronics engineering from the Aristotle University of Thessaloniki
1999B.Sc.Physics from the Aristotle University of Thessaloniki

Experience

2010Postgraduate lecturer in the university of Peloponnese
2009-2010 Adjunct lecture in the university of Peloponnese

Publications: Journals

[1]  N. Kavvadias and S. Nikolaidis, "Scalable register bypassing for FPGA-based processors, " Microprocessors and Microsystems, Volume 33, Issues 7-8, pp. 441-452, October-November 2009. Available online: 29 July 2009. (DOI article link) (bibtex)
[2]  N. Kavvadias and S. Nikolaidis, "Elimination of overhead operations in complex loop structures for embedded microprocessors, " IEEE Transactions on Computers, Vol. 57, No. 2, pp. 200-214, February 2008. (DOI article link) (bibtex)
[3]  N. Kavvadias, V. Giannakopoulou and S. Nikolaidis, "Development of a customized processor architecture for accelerating genetic algorithms, " Microprocessors and Microsystems, Volume 31, Issue 5, pp. 347-359, 1 August 2007. Available online: 12 January 2007. (DOI article link) (External article link) (bibtex)
[4]  N.D. Vassiliadis, N. Kavvadias, G. Theodoridis, and S. Nikolaidis, "A RISC architecture extended by an efficient tightly coupled reconfigurable unit, " International Journal of Electronics, Vol. 93, No. 6, pp. 421-438, June 2006. (DOI article link) (Publisher article link)
[5]  N. Vassiliadis, A. Chormoviti, N. Kavvadias and S. Nikolaidis, "The effect of data-reuse transformations on multimedia applications for application specific processors, " International Scientific Journal of Computing, Vol. 4, No. 3, pp. 102-109, 2005. (Publisher article link)
[6]  N. Kavvadias and S. Nikolaidis, "Zero-overhead loop controller for implementing multimedia algorithms, " IEE Proceedings-Computers & Digital Techniques, Vol. 152, No. 4, pp. 517-526, July 2005. (DOI article link) (bibtex)
[7]  S. Nikolaidis, N. Kavvadias, T. Laopoulos, L. Bisdounis, and S. Blionas, "Instruction Level Energy Modeling for Pipelined Processors, " "Instruction Level Energy Modeling for Pipelined Processors, " Journal of Embedded Computing, Vol. 1, No. 3, pp. 317-324, 2005. (Publisher article link)
[8]  N. Kavvadias, P. Neofotistos, S. Nikolaidis, K. Kosmatopoulos and T. Laopoulos, "Measurements Analysis of the Software-Related Power Consumption in Microprocessors, " IEEE Transactions on Instrumentation and Measurement, Vol. 53, No. 4, August 2004, pp. 1106-1112. (DOI article link) (bibtex)

Publications: Conferences/Workshops/Symposiums

[1]  Nikolaos Kavvadias and Kostas Masselos, "NAC: A lightweight intermediate representation for ASIP compilers, " presented at the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'11), Las Vegas, Nevada, USA, July 18-21, 2011.
[2]  N. Kavvadias and K. Masselos, " Efficient hardware looping units for FPGAs, " Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2010), pp. 35-40, Lixouri Kefalonia, Greece, July 5-7, 2010. (presentation) (presentation with notes) (DOI article link) (bibtex)
[3]  N. Kavvadias and S. Nikolaidis, " The ByoRISC configurable processor family, " Proceedings of the IFIP/IEEE VLSI-SoC 2008: International Conference on Very Large Scale Integration, pp. 439-444, Rhodes Island, Greece, October 13-15, 2008. (bibtex)
[4]  N. Kavvadias and S. Nikolaidis, " YARDstick: Automation tool for custom processor development, " presented at the University Booth of the Design, Automation and Test in Europe Conference (DATE'07), Nice, France, April 16-20, 2007. (External link) (go to webpage)
[5]  N. Kavvadias and S. Nikolaidis, " A portable specification of zero-overhead looping control hardware applied to embedded processors, " in Proceedings of the 2006 IEEE International Symposium on Circuits and Systems, pp. 1599-1602, Kos, Greece, May 21-24, 2006. (DOI article link) (bibtex)
[6]  N. Kavvadias and S. Nikolaidis, " A flexible instruction generation framework for extending embedded processors, " in Proceedings of the 13th IEEE Mediterranean Electrotechnical Conference (MELECON 2006), pp. 125-128, Benalmadena (Malaga), Spain, May 16-19, 2006. (DOI article link) (bibtex)
[7]  N. Vassiliadis, A. Chormoviti, N. Kavvadias, and S. Nikolaidis, "The Effect of Data-Reuse Transformations on Multimedia Applications for Application Specific Processors, " in Proceedings of the Third IEEE International Workshop on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications (IDAACS 2005), pp. 179-182, Sofia, Bulgaria, September 5-7, 2005. (DOI article link)
[8]  N. Kavvadias and S. Nikolaidis, " Automated Instruction-Set Extension of Embedded Processors with Application to MPEG-4 Video Encoding, " in Proceedings of the 16th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2005), pp. 140-145, Samos, Greece, July 23-25, 2005. (longer draft version) (DOI article link) (bibtex)
[9]  N. Kavvadias and S. Nikolaidis, " Hardware support for arbitrarily complex loop structures in embedded applications, " in Proceedings of the Design, Automation and Test in Europe Conference (DATE'05), pp. 1060-1061, 2005, Munich, Germany, March 7-11. (Arxiv link) (DOI article link) (External article link) (bibtex)
[10]  N.D. Vassiliadis, N. Kavvadias, G. Theodoridis, and S. Nikolaidis, "A RISC architecture extended by an efficient tightly coupled reconfigurable unit, " in Proceedings of the 1st International Workshop on Applied Reconfigurable Computing 2005 (ARC 2005), pp. 41-49, Algarve, Portugal, February 22-23, 2005. (bibtex)
[11]  N. Vassiliadis, A. Chormoviti, N. Kavvadias, and S. Nikolaidis, "The Effect of Data-Reuse Transformations on Multimedia Applications for Different Processing Platforms, " Proceedings of the 14th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2004), pp. 593-602, Santorini, Greece, September 15-17, 2004. (DOI article link) (External article link) (bibtex)
[12]  N. Kavvadias and S. Nikolaidis, " Application Analysis with Integrated Identification of Complex Instructions for Configurable Processors, " Proc. of the 14th Intl. Workshop on Power and Timing Modeling, Optimization and Simulation, pp. 633-642, Santorini, Greece, September 15-17, 2004. (DOI article link) (External article link) (bibtex)
[13]  N. Kavvadias and S. Nikolaidis, " Tradeoffs in the Design Space Exploration of Application-Specific Processors, " in Proceedings of the IFIP WG 10.5 Conference on Very Large Integration of System-on-Chip (VLSI-SoC 2003), pp. 233-238, Darmstadt, Germany, December 1-3, 2003. (bibtex)
[14]  S. Nikolaidis, N. Kavvadias, T. Laopoulos, L. Bisdounis, S. Blionas, " Instruction Level Energy Modeling for Pipelined Processors, " Proceedings of the 13th International Workshop on Power Analysis and Timing Modeling, Optimization and Simulation (PATMOS 2003), pp. 279-288, Torino, Italy, September 2003. (DOI article link) (External article link) (bibtex)
[15]  N. Kavvadias, P. Neofotistos, S. Nikolaidis, K. Kosmatopoulos and Th. Laopoulos, " Measurements Analysis of the Software-Related Power Consumption in Microprocessors, " in Proc. of the IEEE Instrumentation and Measurement Technology Conference, Vol. 2, pp. 981-986, Vail, CO, USA, May 2003. (DOI article link) (bibtex)
[16]  S. Nikolaidis, N. Kavvadias, P. Neofotistos, K. Kosmatopoulos, T. Laopoulos, L. Bisdounis, "Instrumentation set-up for Instruction level power modeling, " in Proceedings of 12th International Workshop on Power Analysis and Timing Modeling, Optimization and Simulation (PATMOS 2002), pp. 71-80, Seville, Spain, September 2002. (DOI article link) (External article link) (bibtex)
[17]  N. Kavvadias and S. Nikolaidis, " Parametric Architecture for Implementing Multimedia Algorithms, " Proceedings of the 9th International Conference on Digital Signal Processing (DSP2002), Vol. 2, pp. 1261-1264, Santorini, Greece, July 2002. (presentation) (DOI article link) (bibtex)
[18]  N. Kavvadias, A. Chatzigeorgiou, N. Zervas, and S. Nikolaidis, " Memory hierarchy exploration for low power architectures in embedded multimedia applications, " Proceedings of the IEEE 2001 International Conference on Image Processing (ICIP'01), Vol. 3, pp. 326-329, Thessaloniki, Greece, October 2001. (presentation) (DOI article link) (bibtex)
[19]  N. Kavvadias, A. Zanikopoulos, Ch. Voliotidis, S. Kougia, A. Chatzigeorgiou, N. Zervas, and S. Nikolaidis, " Power exploration of parallel embedded architectures implementing data-reuse transformations, " Proceedings of the 8th IEEE International Conference on Electronics, Circuits and Systems (ICECS'01), Vol. I, pp. 781-784, Msida, Malta, September 2001. (DOI article link) (bibtex)