[1] | Electromigration in width transition copper interconnect, Arijit Roy, Yuejin Hou, Cher Ming Tan, Microelectronics Reliability, Vol. 49, pp. 1086-1089, 2009, Impact Factor 1.290, Cited: 0 times. |
[2] | Very high current density package level electromigration test for copper interconnects, Arijit Roy, Cher Ming Tan, Journal of Applied Physics, Vol. 103, pp. 093707(1-7), 2008, Impact Factor 2.316, Cited: 1 times. |
[3] | Application of gamma distribution in electromigration for submicron interconnects, Cher Ming Tan, Nagarajan Raghavan, Arijit Roy, Journal of Applied Physics, Vol. 102, pp. 103703(1-9), 2007, Impact Factor 2.316, Cited: 5 times. |
[4] | Probing into the asymmetric nature of electromigration performance of submicron interconnect via structure, Arijit Roy, C. M. Tan, Thin Solid Films, Vol. 515, pp. 3867-3874, 2007, Impact factor 1.666, Cited: 5 times. |
[5] | Room temperature observation of point defect on gold surface using thermovoltage mapping, Arijit Roy, C. M. Tan, S. J. O'shea, K. Hippalgaokar, W. Hofbauer, Microelectronics Reliability, Vol. 47, pp. 1580-1584, 2007, Impact Factor 0.815, Cited: 0 times. |
[6] | Electromigration in damascene copper interconnects of line width down to 100 nm, Arijit Roy, R. Kumar, C. M. Tan, T. K. S. Wong, C.-H. Tung, Semiconductor Science and Technology, Vol. 21, pp. 1369-1372, 2006, Impact Factor 1.222, Cited: 7 times. |
[7] | Experimental investigation of the impact of stress free temperature on the electromigration performance of copper dual damascene submicron interconnect, Arijit Roy, C. M. Tan, Microelectronics Reliability, Vol. 46, pp. 1652-1656, 2006, Impact Factor 0.742, Cited: 3 times. |
[8] | Investigation of the effect of temperature and stress gradients on accelerated EM test for Cu narrow interconnects, C. M. Tan, Arijit Roy, Thin Solid Films, Vol. 504, pp. 288-293, 2006, Impact Factor 1.569, Cited: 20 times. |
[9] | Effect of test condition and stress free temperature on the electromigration failure of Cu dual damascene submicron line-via test structure, Arijit Roy, C. M. Tan, R. Kumar, X. T. Chen, Microelectronics Reliability, Vol. 45, pp. 1443-1448, 2005, Impact Factor 0.607, Cited: 3 times. |
[10] | Current crowding effect on copper dual damascene via bottom failure for ULSI Applications, C. M. Tan, Arijit Roy, A. V. Vairagar, A. Krishnamoorthy, S. G. Mhaisalkar, IEEE Transactions on Device and Materials Reliability, Vol. 5, No. 2, pp. 198-205, 2005, Impact Factor 1.044, Cited: 20 times. |
[11] | Effect of vacuum break after the barrier layer deposition on the electromigration performance of aluminum based line interconnects, C. M. Tan, Arijit Roy, K. T. Tan, D. S. K. Ye, F. Low, Microelectronics Reliability, Vol. 45, pp. 1449-1454, 2005, Impact Factor 0.607, Cited: 0 times. |
[12] | Optimal design of broadband long period grating-based LP01↔LP02 mode converters for dispersion compensation, Arijit Roy, P. Sharan, H. N. Acharya, Journal of Optical and Quantum Electronics, Vol. 35, Issue 6, pp. 561, 2003, Impact Factor 0.732, Cited: 2 times. |