Gate Leakage Current in GaN HEMT’s: A Degradation Modeling Approach

In this paper we p resent an empirical preliminary model able to simulate the degradation with t ime in the gate leakage current in GaN HEMT devices. The model is based on extensive reverse and forward current measurements, carried out on a wide range of different device designs and under different bias, performed over aged transistors by III-V Lab (Alcatel-Thales) within the European KORRIGAN. A closed form expression for the reverse gate current, depending on time, as well as the expression parameters extraction procedure are presented. The experimental and simulated results presented illustrate the validity of the model as well as it’s usefulness in reliability studies.


Introduction
In applications such as high-power and high-frequency amp lifiers for base stations AlGaN/ GaN HEMT devices offer the circuit designer certain advantages over the mo re traditional GaAs devices. These mostly relate to the ability of these devices to handle high operating voltages under high current conditions. Their main drawback, however, relates to their reliability which needs to improve considerably [1]. While reliability issues have been considered by others on AlGaN/ GaN devices [2][3][4][5] the emphasis of the wo rk has been on the degradation in the output current, the power d issipated and the drain resistance R d of such devices [6]. The degradation effects on the gate leakage current arises as an important feature when studying GaN HEMT reliability [7][8][9][10][11][12], being worthy of note its effect on the saturation current and breakdown voltage parameters of the device [13].
In this paper we present an empirical model ab le to simu late the degradation in the gate leakage current with time on AlGaN/ GaN devices. The model presented in this work is based on extensive experimental measurements carried out by III-V Lab (A lcatel-Thales) within the European KORRIGAN p roject on many specimens over prolonged periods of time (2000 hours).

Gate Leakage Current
As stated previously, AlGaN/ GaN HEMT devices are well suited to high-power high-frequency applications such as high power amplifiers and applications for wireless base stations. For such cases there is a general requirement for a low input gate current and a high reliability figure for the device. In p reviously reported work [14] the role played by the degradation with time in the gate leakage current is important in the understanding of the reliability issue for the device.
Fro m a physical point of view the degradation, and hence changes observed with the device, arise fro m defects under the gate region. These become more evident at a critical point in the value of the electric field [13][14]. Trap formation in the device at either the semiconductor surface or within the bulk is also a performance-limit ing issue. To date, however, a clear exp lanation for the physical mechanisms which ties together the failure or reliability of the device and the degradation in it's electrical characteristics is unavailable.
The gate leakage current surges as a consequence of surface processing and passivation issues. In Field Effect devices quantum mechanical tunnelling has been clearly shown to be an important effect to be accounted for [13]. For example, electrons tunnelling fro m the gate can create a gate-to-drain leakage current by hopping fro m trap to t rap. Alternatively, the electrons can accumulate on the surface next to the gate or move through the AlGaN layer to the conducting channel [15].
A model to simu late the gate leakage current in GaAs MESFET's due to tunnelling effects is described in [16]. This model was subsequently altered in [17] to be applicable to GaN devices.
The gate leakage current due to tunnelling effects is represented in circuit form as a generator connected between the gate and drain terminals of the device. The electric field at the edge of the gate terminal is reduced by the electrostatic feedback. Th is reduces the electron tunnel leakage current. As the number of electrons increases at the gate edge as a function of time the gate leakage current reduces due to the feedback. In addit ion, the increased electron density on the AlGaN surface decreases the number of 2DEG electrons and this causes the gate current to decrease [15][16].

Gate Leakage Current Degradation Model
The leakage mechanism in GaN and AlGaN Schottky interfaces was considered by Yu et al [18] and M iller et al [19]. This work was based on field-emission tunnelling transport assuming a triangular Schottky potential distribution. To obtain good agreement with experimental results, however, requires a value for the donor density which is higher than in practice. Th is led them to suggest a defect-assisted tunnelling mechanism to increase the leakage current. A surface patch model was proposed by Sawada et al [20] to explain the forward current characteristics. M iller et al [21] have also proposed a leakage mechanis m associated with a variable-range hopping conduction through threading dislocations.
As will be demonstrated later, we have found the thermionic field emission (TFE) model to provide a good compro mise between accuracy and ease of parameter extraction.
In the TFE model, the reverse current, Ig leak, arises fro m electrons that are thermally excited fro m the metal Fermi junction and tunnel through the semiconductor depletion layer to the semiconductor conduction band [22].
The reverse current can be expressed by the following equations [22]: Where Vr is the reverse bias, A is the area of the d iode, A* is the Richardson constant, T is the Temperature of the channel, (q is the electron charge and K is the Boltzmann constant) and Bn φ is the Schottky barrier height.
The term 00 E is the characteristic energy related to the tunneling probability in the Wentzel-Kramers-Brillouin approximation which depends on the donor density N d .
Fro m the life tests (electrical and thermal aging for a total duration in the region of 2000 hours) experimental results, we observe that the most time dependent parameters were the Schottky barrier height Bn φ and the donor density N d [18][19].
Fro m reverse and forward current measurements (carried out on a wide range of different device designs and under different bias) performed over aged devices, we have observed that the time dependency of parameters N d and Bn φ can be expressed, fro m a macroscopic point of view, as: Where N d0 is the donor density at t = 0 h, is the Schottky barrier height at t = 0 h, N d1 , p 1 , p 2 , p 3 , and p 4 are the parameters of the equation describing the behavior of the expression.
These expressions demonstrate that high operating temperature conditions causes important changes to the schottky barrier height and to the donor distribution. Th is has also been observed through the various life-tests experiments carried out on many different specimens.

Device descripti on and Performed Measurements
In order to validate the approach adopted, five aged  The bias point used in the aging test is 25V Vds and Ids 420 mA/ mm. The drain current is kept constant by automatic gate voltage control so that the dissipated power is constant and the temperature of the junction as well. In Table 1, summarizes the test conditions for the different devices during the aging process As an examp le, Figure 1 shows the variation of the gate current over different aging time intervals for the 8x75 m µ device. The measurements were performed as a function of Vgs at a Vds of 25V after thermal and electrical aging at the temperature T = 175℃.

Extracti on of the Model Parameters
In brief, the ext raction of the model parameters is performed in three steps as: (i). At time t 0 , the value of parameter 0 B φ is obtained using a high precision current source. Fo r this measurement the gate-drain junction is forward biased Figure 2 and the parameter measured under very low current conditions (<1mA) so that the parasitic resistance of the device has a negligible effect. Clearly this assumption is only valid under this condition and for the purpose of extracting this parameter.
(ii). The device is then aged over time according to the conditions shown in Table 1. For each device and test condition, measurements are made under forward (step (i)) and reverse bias conditions as shown in Figure 1. For each device, parameters N d0 (at time t = 0 h) and N d1 are determined fro m reverse bias measurements. Using this informat ion parameter N d is then calculated and optimised.
(iii). The parameters (p 1 , p 2 , p 3 and p 4 ) of equation (4) are obtained from forward bias measurements ( Figure 2). Prior to extracting these parameters the measured current values are adjusted using the parameter values of equation (4) determined previously. The results of this exercise are shown in Tables 2 and 3.   Bearing in mind that the test devices considered here are N type HEMT's with Ni/Au Schottky junctions, it can be seen that the results here are in keeping with those to be expected and presented elsewhere [23]. For examp le, the value of Bn φ is less than 1V. A lso notice that for the 8X75 m µ device the value of parameter 0 B φ reduces as the ambient temperature increases. This is also in keeping with the results presented elsewhere [24,25]. Th is can be explained by the fact that the additional ionized doping atoms, arising fro m the positive fixed charge at the surface, increases the number of ionized doping atoms at the surface. Tunnelling is, therefore, easier since the barrier is thinner at the surface.
The devices studied in this work are different transistors galliu m nitride HEMT of Waffer (A EC1303) and Waffer (AEC1388) submitted to different thermal and electrical aging , as shown in the table 1; this can explain the observed differences between the value of the parameters of equation 7 for the devices studied. As an example, the value of parameter p 1 for the device D1 and D5 is negative wh ile for the other devices is positive; and that can be explained by: the measurement results Ig with time decreases and also the first part of the equation 4 is a polynomial. Figures 3 and 4 Show the evolution of with t ime for devices under test.   Table 1. The results indicate good agreement between the experimental and modelling approach. The discrepancies between the measured and simu lated results are largely due to measurement errors and the optimisation strategy employed to refine the model parameter values. These two areas are under consideration taking into account the need for the model and general approach to be useful to devices fabricated by a wide range of foundry houses and processing conditions. It is interesting to observe from the results for device D4 and D5 the increase in the value of Ig leak and the reduction in the value of N d as the gate area increases. It should be remembered that the measurements for these two devices are performed under identical operating conditions. These results are in keeping with those presented [26].

Conclusions
A model to simu late the degradation in the leakage current with time has been applied to AlGaN/ GaN HEM T devices of varying sizes fro m different manufacturers. These have been measured under a variety of test conditions including various amb ient temperature points. The results clearly show a strong dependence between the leakage current, the barrier potential and the donor density of the gate-drain junction. These results also demonstrate the strong influence that the surface and bulk traps of the material have on the leakage current. Not unexpectedly the results also demonstrate the strong inter-dependence between these variables and the amb ient temperature.