Reconfigurable Voltage Mode Phase Shifter using Low Voltage Digitally Controlled CMOS CCII

The low voltage d igitally controlled current conveyors have been used to realize the d igitally controlled reconfigurable continuous time first order voltage mode phase shifters. Each of the realized phase shifters uses two digitally controlled current conveyers along with three passive elements. The realized phase shifters provide dig ital control to phase angle through an n-bit digital control word. The realized digitally controlled continuous time phase shifters are designed and verified using PSPICE and the results thus obtained justify the theory.

This paper basically deals with the realization of reconfigurable continuous time first order voltage mode phase shifters using Low voltage dig itally controlled CCII. Each of the realized phase shifters uses two digitally controlled current conveyors along with three passive elements. The realized phase shifters provide dig ital control to phase angle through an n-bit digital control word. To verify the theory, the realized digitally controlled continuous time phase shifters are designed and verified using PSPICE and the results thus obtained justify the theory.

The Circuit
The digitally controlled CCII sy mbol is shown in " Figure  1(a)" and its CM OS implementation with 4-b it control is shown in " Figure 1(b )". The cu rrent su mming net wo rk (CSN) is included at port-X [1][2][3][4], [9], [10]. The transfer matrix can be exp ressed as follows. (1) Thus the port voltages and currents for the digitally programmab le current conveyor (DPCCII) can be exp ressed as I Y = 0, V X = V Y and (2) where, N is an n-bit dig ital control word. The voltage mode phase shifters using low voltage digitally controlled CMOS DPCCII are shown in " Figure 2". The DPCCII-uses the CSN at port-Z-as shown in " Figure  1

Figure 1(b). The CMOS implementation of a 4-bit DPCCII-with CSN at port Z-
The voltage mode phase shifters using low voltage digitally controlled CMOS DPCCII are shown in " Figure 2". The DPCCII-uses the CSN at port-Z-as shown in " Figure  1 It is thus evident fro m equations (4) and (6) that the phase angle between output and input of the two phase shifters can be controlled with the digital control word N.

The Effect of Non-Idealities
Taking the non-idealities of CCIIs into account, the relationship of the terminal voltages and currents can be rewritten as: Where, in equation (7) β k is the voltage transfer gain fro m terminal-Y to terminal-X for the kth CCII and α k is the current transfer gains for kth CCII fro m X to Z-respectively. Using equation (7) (8) through (11) it is evident that the phase angles are affected slightly due to the non idealities.

Design and Verification
The realized digitally controlled current mode first order phase shifter of " Figure 2(a)", was designed and verified by performing PSPICE simu lation with supply voltage ± 0.75V using CMOS TSMC 0.25μm technology parameters. The CMOS DPCCII with 4-b it current summing network at port-Z-of " Figure 1(b)" was used. The aspect ratios used are given in the Table 1. In itially the phase shifter was designed for a phase angle ϕ =29 0 at a constant frequency f 0 = 100 KHz with N = 1. Assuming C= 1nF, equation (4) y ields R = 6.36KΩ. Then the phase angle ϕ was controlled through digital control word N. The variation of observed and the theoretical phase angles with different control words 'N' at f 0 = 100KHz are given in " Figure

Conclusions
Two new voltage mode digitally controlled first order phase shifters have been realized using low voltage dig itally controlled CM OS current conveyors. Each of the realized phase shifters uses two dig itally controlled current conveyers along with three passive elements. The realized phase shifters provide digital control to phase angle through an n-bit control word. The realized digitally controlled continuous time phase shifters were designed and verified using PSPICE and the results thus obtained justify the theory.